[hpsdr] What can we do with 2 cards

[Lyle Johnson]

Another couple of thoughts on this:

1) My micrometer suggests we can fit a DB-25S, a DE15S and a USB 
connector along one edge of Ozy.

So, we could create signals that mimic a parallel port and its wiring so 
a standard cable can be used between Ozy and an SDR-1000 for control. 
This solves the "I want to control my SDR-1000" problem.

The DE-15S can accommodate some digital inputs and outputs and whatever 
else is left - reset pushbutton input, etc.  We can define some as 
inputs and some as outputs.  This solves the "I want to hook up my CW 
paddle"problem, and maybe solves a few of the "I want to control other 
stuff" desires.

2) Leave the logic analyzer connections in place if there is physical 
room, but these may also be the signals that go to the DB25 and DE15. 
Makes it easy to connect the LA, and doesn't dedicate the pins solely to 
debug.

3) Buffer the inputs through a 74LVC541.  This allows 5V inputs and 
converts them to 3.3V logic levels, and isolates the outside world from 
the expensive stuff.  Put a 10K pull up to +5V on all the inputs, and a 
series resistor of 100 ohms or so to the physical input.  Put a 50 to 
100 pF cap at the IC input.  The 100 ohm series R and 100 pF shunt C 
will help keep EMI out, the 10K pull up will allow you to directly hook 
up a key or paddle and will current limit things as well.  It will also 
not prevent you from driving the input with 3.3V or 5V logic levels.


Thus:
                 10K
    +5V--------/\/\/\/\/---+
                           |
  LVC input---+--/\/\/\/---+--- physical input
            --+--  100R
     100p   --+--
              |
             GND


If PCB space is a problem, R and C networks are readily available in 
SMT, and we can put parts on both sides of the PC board.  Passives like 
this are good candidates for the second side.

4) Buffer the outputs through a 74ACT541.  This give you lots of drive 
current, 5V levels, accepts 3.3V drive from Ozy and isolates the 
expensive stuff through a cheap buffer.  Could consider a small series 
resistance of 10 to 50 ohms followed by a bypass cap of 50 to 100 pF at 
the connector pin for EMI reduction and limited protection of the chip.

5) The PCA chip could also be used for I/O.  At 400 kHz on I2C, this 
gives us a maximum bandwidth of 25 kHz/pin for a 16-bit part. I suspect 
1 kHz/pin is more than enough for any sort of keyer and probably fast 
enough for the parallel port interface to the SDR-1000, although direct 
drive may be better.  At 1 kHz/pin, were talking 16 kHz of I2C bandwidth 
on a 400 kHz bus. That is an over simplification, of course, because 
there is I2C addressing and handshaking going on, but it still isn't 
much of the available bandwidth.  And our needs are bursty in nature, as 
are the likely needs of other I2C users of the bus, so we should be able 
to live together in peace and harmony...

6) This also keeps digital signals off of the connector area of Janus, 
leaving Janus to focus on analog interface issues.  Ozy, digital by 
nature, retains the digital interfaces.  It also minimizes any latency 
issues between the FX2 and the real world.

Enjoy!

Lyle KK7P


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