[hpsdr] Dual Synthesiser

[Grant Hodgson]

Brian

>> I need 640 MHz and 100 MHz for my 10 GHz rig. 

That's a very unusual combination.  The easiest way to generate an LO 
for 10GHz with a PLL is to use a 2.4GHz VCO and multiply by 4; good 
quality multipliers are available such as the HMC443LP4 which require 
very little filtering.

I have been looking at
>> various ways to do this including using two of the REFLOCK II boards 
>> and various demo boards.
  These are not the hardest of frequencies to
>> generate but as the 640 MHz has to be multiplied by 16 so its phase 
>> noise has to be quite good.  I am tending towards building a 
>> synthesizer using two standard T paged VCOs and an LMX 2485 loaded by 
>> a CPLD.

With a Frac-N PLL IC such as the LMX2485 (which incidentally is an 
absolutely superb IC) you don't need a reflock - you can generate almost 
any frequency you want in steps of a few Hz with a standard 10MHz 
reference.  Fractional and sub-fractional spurs within the loop 
bandwidth are at quite low levels; I have posted a number of plots on 
the uWSDR Yahoo group files section for those that like that sort of 
thing.  I'll put them on my website if anybody wants them without having 
to join the uWSDR group.

>> It seams that this could be a useful board for many other applications 
>> including the LO generation for SDRs. In the case of low IF radios the 
>> lower frequency synthesizer could be made to tune an octave at some 
>> VHF frequency and divided by the CPLD to give the necessary coverage. 
>> The higher frequency synthesizer could be used for down converting 
>> higher bands to the SDR frequencies.

I'm guessing that you want to use a 'low frequency' SDR as an IF for a 
10GHz transverter?  That's one way of doing it, using the SDR to replace 
a 28MHz or 144MHz radio.  However, new technologies allow the 10GHz 
signal to be converted directly to baseband, eliminating the 
intermediate stage altogether.  This is what the uWSDR project is 
working on; a 'beginners' low-cost 10GHz SDR is being considered at the 
moment; other SDRs for 1.3GHz and 2.3GHz are further along in the 
development cycle.

Or maybe I mis-understood?

There are issues with dividing down a VHF/UHF LO, and the phase noise 
may not be as good as you may expect - the 9852 DDS as used on SDR-1000 
takes some beating for close-in phase noise at HF, and a simple 
divided-down PLL can't match it.

>> Specifically for my initial application I am looking at using a 
>> Sirenza CRO 190-1280T vco, with a 1240 to 1320 MHz tuning range, 
>> divided by 2 for the 640 MHz.

That's a good VCO, but requires quite a narrow bandwidth to get optimal 
phase noise. But I'm not quite sure why it would need to be divided and 
then multiplied - direct multiplication would give less spurs.  But even 
better VCOs are available for the 2.5-2.6GHz band from a number of 
manufacturers.

More details of the Microwave SDR project can be found at

uwsdr.berlios.de      and the Yahoo group is at

groups.yahoo.com/group/uwsdr

Hope the non-microwavers on list don't mind the bandwidth.

regards

Grant  G8UBN