[hpsdr] Penelope - Verilog block diagram

[Eric Ellison]

Phil!

This is really nice! You sure have put a LOT of time into Pen and it shows!
The block diagram makes it much more understandable, as the project gets
more complex. Also should allow me, and others to relate and 'drill down' to
the various verilog modules as they become available to learn how it works.
It becomes a excellent 'training' tool. For me that it is how we lurkers
benefit from your efforts. Looks like you have thought of everything in Pen.
She is pretty! I look forward to having one!

Thanks!
Eric


-----Original Message-----
From: hpsdr-bounces at hpsdr.org [mailto:hpsdr-bounces at hpsdr.org] On Behalf Of
Phil Harman
Sent: Sunday, April 01, 2007 1:30 AM
To: 'High Performance Software Defined Radio Discussion List'
Subject: [hpsdr] Penelope - Verilog block diagram

***** High Performance Software Defined Radio Discussion List *****

I've upload a block diagram to the Wiki of the Verilog code that I am 
developing for  Penelope.
Having not documented like this before I would appreciate feedback on how 
useful such diagrams will be to those that may wish to understand, or modify

the code themselves, later on.

< 
http://hpsdr.org/wiki/index.php?title=PENELOPE#PENELOPE_-_Companion_Exciter_
to_Mercury >

The code is still under development and will be in  SVN ASAP.

73's Phil...VK6APH




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