[hpsdr] New Mercury block diagram

[Tom Homsley]

I think it may take a software genius who also understands the
hardware/Verilog to decompose the hardware and Verilog block diagrams into
functional "flows".  In the DSP world, the "flow" is generally a simple
interrupt, but I think something could be done.  One thing that would help
and, I think, should be a "requirement" is a "media paper" like Phil and
Bill wrote for JANUS. 

               see Media:Janus-DCC-2006-paper.pdf
<http://hpsdr.org/wiki/images/4/46/Janus-DCC-2006-paper.pdf>  

 

In my limited experience, DSP and Verilog designers tend to document their
code using comments embedded in the code.  This is good for them but the
rest of us may be used to a different paradigm.  OK, I used all the big
words I know.   73

 

Tom, N4WBS

Huntsville AL

HPSDR, TAPR, Norcal QRP, NoGA QRP, NADXC

 

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