[hpsdr] ozy / janus

[Don AE5K]

Very good questions and replies...  I'll add them to the FAQ page on the
wiki soon.

Don AE5K

Lyle Johnson wrote, On 02/13/2007 06:12 PM:
> ***** High Performance Software Defined Radio Discussion List *****
> 
>> I wonder if usable code will be loaded into the FPGAs.
> 
> Janus has a CPLD and it will be loaded with a useful image that allows 
> it to function with the modified PowerSDR software.
> 
> Ozy has an FPGA and it has to be loaded each time you power up. 
> Normally,this would be done through the USB port, but there is also a 
> Flash configuration memory on Ozy that *may* be loaded with a runtime 
> image.  Ozy is intended to use the USB connection in normal operation, 
> so the FPGA's configuration Flash does not *need*to have any thing in it.
> 
>> I wonder if someone could tell us lurkers what the production units will
>> do out of the box.
> 
> The intent is that they provide a high-end sound card equivalent to run 
> an SDR such as the SDR-1000.  The prototypes are running with SDR-1000 
> now...
> 
>> I'm thinking this would be a good project to expand my hackware skills.
> 
> Not sure what you want to hack, but Ozy is a good FPGA 
> development/learning tool, and Janus is a good ADC etc.
> 
>> Also what kind of tools will be required to read source code change compile
>> and load different FPGA firmware.
> 
> The free Altera Quartus II tools are being used for FPGA development for 
> Ozy and CPLD development for Janus.  You need a computer that will run 
> these tools.  < URL:http://www.altera/com >
> 
> 73,
> 
> Lyle KK7P

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