[hpsdr] Ozy Design

[Gerd Loch]

I have two questions on the design of Ozy:

1. The FPGA in the schematic is EP2C5 while it is EP2C8 in the BOM.
As the larger memory of the EP2C8 is not really used (at least with the
actual firmware) an EP2C5 would be conveniant. Is it fully compatible in the
current design?

2. There is a DS2480B on the board which is not used by the current software
as far as I could see.
What was the intention to implement this rather complex and expensive 1-wire
chip?

Gerd, DJ8AY