[hpsdr] ADC Question

[Joe Martin K5SO]

Hi Larry, 

The Metis board currently runs with a 125 MHz clock while Penelope and Mercury use 122.88 MHz, so different clock speeds isn't critical but needs to be considered in the firmware routies.  The IQ data output needs to be 192KHz/96KHz/48KHz selectable for the IQ streams out of the Mercury to be compatible with the current scheme and with the other Mercury.  

Further, if you were planning to use the two Mercury boards for coherent phasing operations such as diversity/steering/direction finding ops, it would be difficult (impossible?) using two different ADC sampling rates and different clocks on the two receiver boards.  

73, Joe K5SO

On Jul 24, 2012, at 12:32 PM, Larry Gadallah wrote:

> ***** High Performance Software Defined Radio Discussion List *****
> 
> I'm building a second Mercury board up from scratch, and I'm considering using a different ADC, from the same family as the LTC2208; the LTC2207 which is pin-compatible with the LTC2208 and offers slightly better ENOB and SFDR but at a little slower sample rate (105 MSPS versus 130, and yes, you would lose some or all of the 6M band in doing this). 
> 
> Since the stock Mercury uses the 122.88 MHz clock to drive the ADC, I presume that this clock would have to be slowed down to something less than 105 Mhz to work with the LTC2207. My question is: What else would this affect? Could one card on the Atlas bus run at it's own clock rate compared to the rest? Would the firmware still work asynchronously, or does it have the 122.88 Mhz clock "hardcoded" in places?
> 
> Thanks,
> -- 
> Larry Gadallah, VE6VQ/W7                          lgadallah AT gmail DOT com
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