[hpsdr] Follow-up on Hermes-Lite

[k3it]

I opened the Hermes_Lite project in Quartus and appears it has the pieces
required for VNA mode.  It's worth a try.

The FPGA is 71% full and may even have enough room for the second receiver
instance.


On Tue, Apr 15, 2014 at 5:50 PM, <rodwall1234 at gmail.com> wrote:

> ***** High Performance Software Defined Radio Discussion List *****
>
>
>  Hi Steve,
>
> I guess that if Herms Lite is firmware/software compatible with it’s big
> brother. I t can also be used as a VNA? At $150.00 for the hardware makes
> it a cheap VNA. Can Hermes Lite be used as a VNA?
>
> Thanks,
>
> Roderick Wall, vk3yc.
>
> *From:* Steve Haynal <steve at softerhardware.com>
> *Sent:* ‎Tuesday‎, ‎15‎ ‎April‎, ‎2014 ‎2‎:‎02‎ ‎PM
> *To:* hpsdr at openhpsdr.org
>
> Hello All,
>
> I've read the comments and questions on the Hermes Lite and tried to
> capture my responses below.
>
> * The jumper on the FPGA board selects whether the FPGA board is powered
> through the 80-pin connector or USB. This jumpered signal does run to the
> daughter board and in the next versionn should be controlled by the
> daughter board. There is a github issue recorded for this.
>
> * The prototype has extra jumpers to provide flexibility to try different
> things. The next version of the PCB can reduce the number of jumpers.
>
> * The power output is theoretically 100 mW, and even 200 mW if you
> tolerate some distortion. If have tested up to 50 mW as shown in the WSPR
> spots. I couldn't go up to 100 mW because I did not have a binocular core
> of the right size on hand to get the proper turns ratio. Eventually, I'd
> like to see a small amp integrated to make this more like a RXTX Ensemble.
>
> * I agree that this project is not ready for general use as it is. Only
> the bravest should attempt to build the current version! I put it out there
> to see what would happen. Who knows what others can and will do... I have
> tried to capture everything I can think of that needs to be fixed/improved
> in the online github project issues list.
>
> * There are unused pins from the FPGA that connect to the unused PCIE-like
> connector. These can be repurposed to provide some I/O and control in a
> next version.
>
> * Thanks to Rob, KL7NA, for keeping the demo going.
>
> 73,
>
> Steve
> KF7O
>
>
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