[hpsdr] CC-Byte0 from fpga to pc

[Joe Martin K5SO]

Okay, very good.  I just checked the behavior of bit 2 in the C0 command bytes coming from Metis, using current firmware in all boards, and it responds fine to the DB9 input pin grounding for DASH.  I don’t know why you’d want to use old firmware/software but maybe you have a reason to do so.  I did not take time to load old version of firmware for these tests.  

Current firmware is: 

Metis_v2.9
Mercury_v3.4
Penelope_v1.8

Current software for PSDR is: 

PowerSDR_mRX_PS_v3.1.17.0

Thanks for updating your situation!  

73, Joe K5SO

On Aug 11, 2014, at 10:44 AM, wully wrote:

> ***** High Performance Software Defined Radio Discussion List *****
> 
> Hi
> 
> I have checked the software and found an error in my code: the ccbyte0 brings the IN0,IN1,IN2-States from all boards, that support these.
> 
> 73, hb9epu
> 
> 
> On 11.08.2014 18:03, wully wrote:
>> Hi
>> 
>> In the Comand-and-Control-Byte 0 from FPGA to PC there are 3 Bits PTT, Dash and Dot.
>> 
>> I would like to use at least one of these bits to control an activity. But I don't know, how these bits are fed.
>> From the schematics of METIS and fpga-code I think that Pins 6,7 and 8 on the DB9 connector should be mapped to these  (debounced) Bits,
>> but grounding these does not show an effect on the CC-Byte 0.
>> 
>> Hardware:
>> Metis (fpga V2.1)
>> Penelope (fpga 1.7)
>> Mercury (fpga 3.3)
>> 
>> 1) Which hardware- bits control the Bits 0..2 of CCbyte0 when using the above hardware?
>> 2) Which hardware- bits control if I use Magister instead of Metis (IN0, IN1 and IN2 are also present there).
>> 
>> Thank you for your information.
>> 
>> 73, hb9epu
>> 


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