[hpsdr] CC-Byte0 from fpga to pc

[wully]

Hi

I have checked the software and found an error in my code: the ccbyte0 
brings the IN0,IN1,IN2-States from all boards, that support these.

73, hb9epu


On 11.08.2014 18:03, wully wrote:
> Hi
>
> In the Comand-and-Control-Byte 0 from FPGA to PC there are 3 Bits PTT, 
> Dash and Dot.
>
> I would like to use at least one of these bits to control an activity. 
> But I don't know, how these bits are fed.
> From the schematics of METIS and fpga-code I think that Pins 6,7 and 8 
> on the DB9 connector should be mapped to these  (debounced) Bits,
> but grounding these does not show an effect on the CC-Byte 0.
>
> Hardware:
> Metis (fpga V2.1)
> Penelope (fpga 1.7)
> Mercury (fpga 3.3)
>
> 1) Which hardware- bits control the Bits 0..2 of CCbyte0 when using 
> the above hardware?
> 2) Which hardware- bits control if I use Magister instead of Metis 
> (IN0, IN1 and IN2 are also present there).
>
> Thank you for your information.
>
> 73, hb9epu
>
>
>
>


 1407775490.0