[hpsdr] openHPSDR at the forefront of SDR development

[John Marvin]

Oh, I'm quite aware that with this architecture the number of receivers 
is purely limited by the processing power and bandwidth you can apply to 
the problem. I look forward to playing with a fpga supporting this for 
Hermes.

With this architecture it might make more sense for many use cases to do 
the I/O on the SBC (i.e. mike/line in and headphone/speaker out), but I 
hope that you will also preserve the capability of using the onboard 
Hermes I/O, i.e. still provide a synchronous mike stream with the single 
ultra wide data receive stream, and a synchronous speaker headphone 
channel, along with the control necessary to support them.

Thanks,

John

On 8/20/2014 6:24 PM, Phil Harman wrote:
> Hi John,
>
> Doing a similar approach for the transmitter is something for the future.
>
> If you only want 12 receivers then we can reduce it to that number :)
>
> 73 Phil...
>
>
>
>> ***** High Performance Software Defined Radio Discussion List *****
>>
>> I see no mention of the transmit side. I assume the current prototype
>> (FPGA in particular) is a receive only implementation? Is DUC still the
>> planned approach for transmit?
>>
>> I may get my 12 receivers (simultanous WSPR reception on all current and
>> experimental ham bands 10m and below) on Hermes yet!
>>
>> Thanks for the update,
>>
>> John
>> AC0ZG
>>
>>


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