[hpsdr] ANAN-100 sometimes no TX after upgrade to 2.9b/3.0 and 3.2.19

[Joe Martin K5SO]

Hi Mike, 

Changes to any firmware for any platform are contained in the “Change Log” comment section of the firmware Verilog source code; e.g., Hermes.v for the case of Hermes.  The source code file can be read using any text editor.  

In the case for OpenHPSDR Hermes (not the Apache Labs modified versions), below are the change entries in the “Change Log” section of the Hermes.v file covering v2.5 to the current v3.0 firmware (all changes from the very begining of Hermes are contained in the Change Log sections of the source code file, the information below is ony an excerpt of the complete Hermes Change Log):

	 4 Jun 2014 	- Fixed bug in iambic.v
						- Reduced receiver number to 4
						- Moved PureSignal feedback to receivers 3 & 4 on Tx
						- Using receiver2 module for Rx3 and Rx4
						- Added C&C bit control of Rx attenuation to use when Tx is active, atten value for this case is
							contained in bits C3[4:0] when C0 = 0001_110x.
						- closed timing
	 10 Jun 2014	- Fixed bug with firmware CW keying
						- Added "PureSignal Enable" control using C&C bit C2[6] when C0=0001_010x; 0 = disabled, 1 =  enabled
						  This bit controls what input is used for Rx4 during Tx; 0 = temp_ADC (duplex operations), 1 = DACD (PureSignal operations)
						- changed version number to v2.9
	 12 Jun 2014   - Updated Apollo code
	 20 Jun 2014   - Merge EER code
	  4 Aug 2014   - Added max and min values for envelope PWM. When C0=0010_001x, C1 = Min [9:2]  C2 = Min [1:0]  C3 = Max [9:2] C4 = Max [1:0]
						- DEBUG_LED1 now used for PWM signal.
	  9 Aug 2014	- Fixed bug in PTT logic that prevented PTT OUT and non-break-in CW mode from
							working when keyed from the external PPT IN on the acc'y jack
	 15 Aug 2014   - Add pipeline to Envelope square and square root functions (100 clock cycles)
						- Scaled Tx iFIR for Envelope so that unity I&Q give unity envelope
						- Added PWM shutdown if IO5 (J16 pin 16) held low.
	 18 Oct 2014   - Updated sdc - false paths to slow I/O.
						- Changed PWM output pin to use fast I/O
						- changed version number to v3.0
		
As you can see from the above, the external PTT input from the acc’y jack was fixed for Hermes on 9 Aug 2014 in v3.0.  

73, Joe K5SO

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