[hpsdr] filtering options in FPGA

[Warren C. Pratt]

Hi Vasiliy,

I work on the signal processing SOFTWARE; so, I won't comment on the 
firmware specifically.  However, there's nothing technically wrong with 
the general approach you propose.  We've experimented with various 
software/firmware splits in this regard.

73,
Warren  NR0V


On 9/21/2013 7:32 PM, k3it wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
>
>
>  Does anybody know how big of an effort would be to modify the current 
> Hermes firmware to send the RX streams after the CIC filters and 
> exclude all FIR processing?   I'd like to run an experiment with 
> implementing a decimating FIR filter on the PC.
>
> For example I'd like CIC decimate to 384k in FPGA and then CFIR 
> decimate by 4 on the PC to get 96k finished spectrum.  is there 
> anything wrong with this approach?
>
> I want to do this for two reasons
> - get feet wet with Verilog
> - see how much FPGA space can be recovered by moving part of the 
> processing to the PC
>
> -- 
> 73! Vasiliy K3IT
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.openhpsdr.org/pipermail/hpsdr-openhpsdr.org/attachments/20130921/c7d2fc01/attachment-0004.htm>