[hpsdr] On my Freedom of Speech - Just a reminder.

[Dan Mills]

Actually the 1791 amendment to the bill of rights penned by our
rebellious colonial brethren purports to guarantee that there shall be
no prior restraint of speech BY THE GOVERNMENT, it says nothing about
such restraint by the owners of  private venues (Such as this list).

Something about "The government shall make no law.....", this is
silent about what policy private entities may or may not have, and so
appeals to the 1791 bill have little relevance.
You see I actually bothered to read the thing, maybe you should too.

Anyway, moving vaguely on topic,
I have been playing with various approaches to dither for word length
reduction in vhdl (Which I am trying to learn), and came across an
interesting paper "High Speed True Random Number Generators in Xilinx
FPGAs", by Catalin Baetoniu which also looks applicable to the Altera
parts, and could probably provide a simple low cost core of a
triangular probability distribution dither source capable of operating
at full adc rate.

As a means to reduce the word length going into the CIC chain this
looks to me to be superior to simple truncation, and could be very
much superior if shaped slightly so that the dither noise ended up
being filtered out by the CIC, for all that FIRs at full rate are not
cheap.
Further dithering the truncation between the phase accumulator and the
cordic chain would seem to reduce the possible spurs when the ftw is
set to a value close to 2^n.

Just thought it was an interesting possibility to explore, as
minimizing excess word length growth is good for both power and fabric
area considerations.

Altogether more interesting then going off on one about at least two
areas of law you don't seem to understand.

73, M0HCN.

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